Software in a hardware view: New models for HW-dependent software in SoC verification and test

Abstract

In current practices of SoC design a trend can be observed to integrate more and more low-level software components into the hardware at different levels of granularity. The implementation of important control functions is frequently shifted from the SoC's hardware into its firmware. This calls for new methods for verification and test based on a joint analysis of hardware and software. While most techniques of software verification operate at a hardware-independent level, this paper elaborates on the possible merits of a hardware-dependent software view. It describes a model recently developed for formal HW/SW co-verification of embedded systems. New results are presented on how to model the interaction of hardware and software in a clock cycle-accurate way. The paper presents different application scenarios of the proposed models in SoC verification and outlines future perspectives in testing and the design of fault-resilient systems.