SoC Power Consumption Estimation at High Level of Abstraction: A Survey Study

Abstract

Abstract—As electric energy consumption becomes a more pressing concern in System-on-a-Chip (SOC) design, accurate and efficient power analysis and estimation at all levels of abstraction throughout the design phase is becoming increasingly important in order to achieve low power without an expensive redesign process. This study examines dynamic power and leaky power analysis and estimation strategies for SOC design at several design levels that have recently been proposed, with the goal of presenting a unified view of power estimation methodologies at all design levels of abstraction, focusing especially on the high level. Keywords— System on Chip; Energy estimation; SoC modelling; Accuracy; High level of abstraction.