Sneak-Path Testing of Crossbar-Based Nonvolatile Random Access Memories

Abstract

Emerging nonvolatile memory (NVM) technologies, such as resistive random access memories (RRAM) and phase-change memories (PCM), are an attractive option for future memory architectures due to their nonvolatility, high density, and low-power operation. Notwithstanding these advantages, they are prone to high defect densities due to the nondeterministic nature of the nanoscale fabrication. We examine the fault models and propose an efficient testing technique to test crossbar-based NVMs. The typical approach to testing memories entails testing one memory element at a time. This is time consuming and does not scale for the dense, RRAM or PCM-based memories. We propose a testing scheme based on “sneak-path sensing” to efficiently detect faults in the memory. The testing scheme uses sneak paths inherent in crossbar memories, to test multiple memory elements at the same time, thereby reducing testing time. We designed the design-for-test support necessary to control the number of sneak paths that are concurrently enabled; this helps control the power consumed during test. The proposed scheme enables and leverages sneak paths during test mode, while still maintaining a sneak path free crossbar during normal operation.