Abstract
A parameterised microcontroller for use in compiled single-chip systems is described. Key processor parameters may be varied over a wide range (minimum data bus width is 4 bits) in order to optimise chip area and performance for a given application. The instruction set is uniform and compact, does not vary when the microcontroller design is scaled, and produces dense code. A working prototype has been produced in Mietec 2.4μ CMOS using the Cathedral silicon compiler, and a variety of 1.2μ and 0.7μ layouts generated from parameterised netlists in the Hilarics and VHDL languages, using both the Cathedral and Synopsys compilers. Code density and layout results are given.
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