Smartphone processor architecture, operations, and functions: current state-of-the-art and future outlook: energy performance trade-off

Abstract

Balancing energy–performance trade-offs for smartphone processor operations is undergoing intense research considering the challenges with the evolving technology of mobile computing. However, to guarantee energy-efficient processor operation, layout, and architecture, it is necessary to identify and integrate optimization techniques and parameters influencing energy–performance trade-off in various processor activity domains. Existing literature on energy optimization in smartphones focuses primarily on individual sub-domains such as OS, GPU, and cloud offloading methods. It reflects multiple smartphone processor activities domains as being the most discussed but less integrated. Through this study, we intend to provide the current state-of-the-art energy optimization techniques for smartphone processor operations. It also classifies multiple energy-draining processor operations along with their thorough discussion of methodologies and popular optimization techniques. The study models smartphone processor sub-components highlighting conventional techniques and performance parameters among its varied domains affecting the device’s energy performance along with significant energy drain minimization without any serious performance degradation. The study analyzes these approaches in the context of applicability, performance, and expected future demands along with revealing limitations of those approaches and open research issues prevailing in the available literature. Finally, we conclude our study by summarizing the current state of the art for smartphone processor activities power consumption.