Small‐swing domino logic based on twist‐connected transistors

Abstract

A new small-swing domino logic that reduces the signal amplitude by adding twist-connected PMOS and NMOS transistors in the conventional domino logic is presented. The circuit lowers the voltage level of a logic `1' and increases the voltage level of a logic `0' while maintaining the logic threshold at half of the supply voltage. The output swing range of the proposed circuit can be modulated by varying the size of the twist-connected transistors and the load capacitance. The 32-bit ripple carry adders designed with the proposed circuit technique reduce power consumption by 37% and the power-delay product (PDP) performance by 43%, as compared with the power consumption and PDP performance of the domino CMOS logic. Thus, the proposed circuit effectively reduces power consumption with the use of the new small-swing domino logic.