Six‐Fold Mobility Improvement of Indium‐Zinc Oxide Thin‐Film Transistors Using a Simple Water Treatment

Abstract

DOI: 10.1002/aelm.201500014 Figure 1 a shows the process-fl ow for the fabrication of IZO TFTs. The TFTs with IZO fi lms that were immersed in DIW prior to fi nal crystallization at 250 °C are henceforth referred to as DIW-treated IZO TFTs and the TFTs with IZO fi lms that were not immersed in DIW are henceforth referred to as untreated IZO TFTs. Figure 1 b shows the schematic of the device structure and Figure 1 c shows the top-view image of an actual device obtained by a 3D optical surface profi ler (NewView 7300, Zygo). The output characteristics of the untreated and DIW-treated IZO TFTs are shown in Figure 1 d,e, respectively. Transfer characteristics of the untreated and DIW-treated IZO TFTs are shown in Figure 1 f. All TFTs work in a low operating voltage range due to the spin coated AlO x dielectric having high capacitance of ca. 151 nF cm −2 measured at 1 Hz (Figure S1, Supporting Information). Untreated IZO TFTs exhibited an average μ FE of ~8.6 ± 0.9 cm 2 V −1 s −1 with a drain on-current to off-current ratio ( I on / I off ) in the range of 10 4 –10 5 . Interestingly, DIW-treated IZO TFTs exhibited higher I on / I off (>10 6 ) with a maximum peak μ FE of ca. 51 ± 5 cm 2 V −1 s −1 , which is six times higher than the untreated IZO TFTs. The dual sweep of the transfer curve showed a very negligible hysteresis with a voltage difference of ca. 0.02 V between the forward and backward sweep (Figure S2, Supporting Information). No signifi cant difference in μ FE of the TFTs was observed with varying channel width to length ratio (W/L) from 5 to 10 (W = 500 μm, L = 100, 75, and 50 μm). The average sub-threshold swing ( SS ) value of untreated and DIW-treated IZO TFTs was found to be 0.189 ± 0.016 V dec −1 and 0.102 ± 0.012 V dec −1 , respectively. Reproducibility of the IZO TFTs with similar performance was checked with repeated experiments. The statistics of the TFT parameters obtained from different experiments is listed in Table S1, Supporting Information, and the corresponding transfer curves are shown in Figure S3, Supporting Information. These results represent the highest fi eld-effect mobility among the solution-processed TFTs using patterned metal oxide channel layers. Positive gate-bias stress (PBS) and negative gate-bias stress (NBS) stability tests were carried out, especially for the DIWtreated IZO TFT and the PBS results are shown in the left panel of Figure 1 g. A bias voltage of +/−1 V was applied to the gate terminal of the TFT during PBS/NBS while the drain and source voltage was fi xed as 0 V. Parallel shifting of the transfer curves was observed in the positive direction with increasing PBS duration. A maximum threshold voltage shift of +0.3 V was observed after 100 s of stress and no signifi cant threshold voltage shift was observed with further increase in PBS duration up to 3000 s. Similar shifting of the transfer curve in the negative direction was observed with increasing NBS duration up to 500 s (Figure S4a, Supporting Information). Parallel shifting of the transfer curves under PBS/NBS with no signifi cant change Transparent metal oxide based thin fi lm transistors (TFTs) have been extensively studied during the last decade due to their potential application in displays and other electronic devices. [ 1 ]