SiO2 shallow nanostructures ICP etching using ZEP electroresist

Abstract

We propose an inductively coupled plasma (ICP) process to etch nanometer scale patterns defined by electron beam lithography in ZEP520A. The nanoscale patterns have been successfully transferred in thermal SiO2 using a CF4 based etching chemistry and a resist post-bake after development. Firstly, we show that platen temperature have a significant effect on line edge roughness (LER). We also present the effect of coil and platen RF power and pressure on sidewall angle, oxide to resist selectivity and LER. We demonstrate that 20nm deep trenches with sidewall angles of 86° and LER of less than 1nm can be etched in an ICP system with a platen temperature of −20°C using an electroresist mask.