Abstract
Due to their fabrication simplicity, fully compatible with low-cost large-area device assembly strategies, source-gated transistors (SGTs) have received significant research attention in the area of high-performance electronics over large area low-cost substrates. While usually based on either amorphous or polycrystalline silicon (α-Si and poly-Si, respectively) thin-film technologies, the present work demonstrate the assembly of SGTs based on single-crystalline ZnO sheet (ZS) with asymmetric ohmic drain and Schottky source contacts. Electrical transport studies of the fabricated devices show excellent field-effect transport behaviour with abrupt drain current saturation (IDSSAT) at low drain voltages well below 2 V, even at very large gate voltages. The performance of a ZS based SGT is compared with a similar device with ohmic source contacts. The ZS SGT is found to exhibit much higher intrinsic gain, comparable on/off ratio and low off currents in the sub-picoamp range. This approach of device assembly may form the technological basis for highly efficient low-power analog and digital electronics using ZnO and/or other semiconducting nanomaterial.
Highlights
The last decade has seen resurgence in the popularity of an already matured field of nanotechnology
We demonstrate fully operational source-gated transistors (SGTs) based on single-crystalline ZnO sheets (ZSs), which to the best of our knowledge, has not been reported so far
The ZSs have a triangular shape and their lengths were deduced from assessment of scanning electron microscopy (SEM) images to be around 5 μ m after 60 min of synthesis
Summary
The last decade has seen resurgence in the popularity of an already matured field of nanotechnology. In contrast to conventional FETs, the SGT exploits the reverse bias Schottky barrier at the source to afford much lower saturation voltages even at high gate voltages This effect leads to several advantages, some of which includes: (i) early drain current saturation[26,28,33] with the drain voltage (VDS), (ii) immunity of drain current (IDS) to channel length variations[33], and (iii) possible immunity to short-channel effects[30]. Detailed discussions will be centred around the ZS growth, nanomaterial characterization and the assembly of single-crystalline ZS based SGTs. detailed electrical transport studies for the fabricated devices will be presented as follows: Schottky barrier height evaluation, field-effect transport, mobility extraction and the modes of SGT operation
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