Evidence of Improved Thermal Stability via Nanoscale Contact Engineering in IGZO Source-Gated Thin-Film Transistors

Abstract

Despite rapidly expanding interest in thin-film source-gated transistors (SGTs), the high-temperature dependence of drain current (TDDC) in devices comprising Schottky source barriers is delaying wide adoption. To reduce this effect, alternative source designs have been theorized. Specifically, introducing additional nanoscale layers at the source contact should facilitate the tunneling of charge carriers at the Fermi energy level with negligible TDDC. Here, we fabricate amorphous In <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text{2}}$</tex-math> </inline-formula> Ga <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text{2}}$</tex-math> </inline-formula> ZnO <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text{7}}$</tex-math> </inline-formula> tunnel-contact SGTs (TC-SGTs) with three times lower TDDC than polysilicon transistors with Schottky contacts. Numerical simulations help elucidate the control mechanisms. We show that the potential profile across the semiconductor in the bulk of the source-gate overlap region determines injection current, and the introduction of a thin interfacial layer at the contact reduces the role of the contact metal work function (WF) in current control and associated temperature effects. This device architecture adds improved thermal stability to the long list of SGT benefits, including low voltage saturation, power-efficient operation, high intrinsic gain, device-to-device uniformity, and robustness to mechanical and electrical stress.