Single transistor primitive for timing and power modelling of CMOS gates

Abstract

An accurate and efficient method for modelling CMOS gates by a single equivalent transistor is introduced in this paper. The output waveform of a CMOS inverter is obtained by solving the circuit differential equation considering only the conducting transistor of the inverter. The effect of the short-circuiting transistor is incorporated as a differentiation of the width of the conducting transistor. The proposed model is the simplest primitive that can be used in order to obtain the propagation delay and short-circuit power dissipation of CMOS gates. Consequently, it can offer significant speed improvement to existing dynamic timing and power simulators while maintaining a sufficient level of accuracy.