Single electron memory devices: Toward background charge insensitive operation

Abstract

We present an experimental study of charging mechanisms in aluminum single electron memory cells where the SiO2 surface between the floating gate and the control gate is used as a barrier dielectric and the single electron transistor is used as a readout device. We study several regimes of charging for different barriers separating the floating gate and the control gate. For thinner barriers, the floating gate acts as a single electron trap, while for thicker barriers a few tens of electrons could be stored on the floating gate to represent a bit. This allows us to realize a background charge insensitive operation of the memory cell. In devices with a barrier thickness in the range 30–100 nm we observe no charge transfer to the floating gate, but rather charging of the surface traps present in the barrier. Our results are in good agreement with theoretical calculations where specific details of device geometry are included in the model.