Simultaneous Temperature Measurement of Wafers in Chemical Mechanical Polishing of Silicon Dioxide Layer

Abstract

The wafer temperature in chemical mechanical polishing (CMP) of silicon dioxide layers was measured. When the temperatures of both the polishing slurry and the polishing pad were controlled at 8° C, the measured wafer temperatures were 10-20° C. The temperature distribution affected the thickness of the polished oxide layer. When the wafer temperature was high, the oxide layer removal rate increased because of the increased reaction of the slurry with the oxide layer. It was clear that there was a linear relationship between the measured wafer temperature and the oxide layer removal rate. The effects of grooving several typical polishing pads for oxide layer polishing were investigated. It was found that grooves on the pad increased the uniformity of the removal of the oxide layer from the wafer.