Simultaneous Measurement of PWB and Chip Package Warpage Using Automatic Image Segmentation

Abstract

The shadow moire and projection moire techniques are widely used methods for measuring printed wiring board (PWB) and PWB assembly (PWBA) warpage. Both methods have high resolution, high accuracy and are suitable for use in an online environment. When measuring the warpage of a bare PWB, maximum warpage across the PWB is calculated by subtracting the minimum out-of-plane displacement on the PWB from the maximum out-of-plane displacement on the PWB. However, when the PWB is populated with electronic components (chip packages); the difference between the maximum and minimum out-of-plane displacements on the PWBA is not the warpage of the PWB or the warpage of the chip packages. In order to use warpage measurement methods such as the shadow and projection moire techniques to accurately and separately determine the warpage of a PWB and chip packages in a PWBA, an automated chip package segmentation algorithm is developed and will be presented in this paper. The automated algorithm is based on active contour models (snakes) and can be used to detect chip package locations on an out-of-plane displacement image of a PWBA. This paper will discuss the characteristics of the automated algorithm, which is applicable to all warpage measurement methods, not just the out-of-plane moire methods. Warpage case studies of PWBs populated with plastic ball grid array chip packages measured using the projection moire technique will also be presented and will show that the developed algorithm along with a warpage measurement method is a powerful tool for measuring the warpage of populated PWBs.