Abstract

This paper presents DTV transmitter design based on the SW/HW hybrid architecture. Parts of the DTV transmission algorithm with less computational complexity are processed by the SW module in PC whereas computationally intensive parts are processed by the HW module in FPGA. The two parts are interconnected by the high speed serial link. To provide the multi-channel DTV signal, we design an architecture where several DTV waveforms are generated simultaneously and combined in the digital domain. We propose a simulink based communication system design and verification methodology. This method reduces the design and verification time of the prototype system significantly and reduces the RTL coding and verification burden.

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