Abstract
In this paper, we report the possible transient behavior for 20nm partially depleted silicon-on-insulator (PD SOI) n-channel MOSFET studied using Synopsys TCAD program. Tunnelling model is set at Si/SiO2 interface by varying front gate oxide. Parasitic floating body effects also have been observed in the device behavior for both linear and saturation regions, the magnitude of these effects depends on the front gate oxide thickness. For 4nm gate oxide thickness, the parasitic floating body effect is dominant at low drain voltage.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.