Abstract

A single-photon CMOS image sensor (CIS) design based on pinned photodiode (PPD) with multiple charge transfers and sampling is described. In the proposed pixel architecture, the photogenerated signal is sampled non-destructively multiple times and the results are averaged. Each signal measurement is statistically independent and by averaging, the electronic readout noise is reduced to a level where single photons can be distinguished reliably. A pixel design using this method was simulated in TCAD and several layouts were generated for a 180-nm CMOS image sensor process. Using simulations, the noise performance of the pixel was determined as a function of the number of samples, sense node capacitance, sampling rate and transistor characteristics. The strengths and limitations of the proposed design are discussed in detail, including the trade-off between noise performance and readout rate and the impact of charge transfer inefficiency (CTI). The projected performance of our first prototype device indicates that single-photon imaging is within reach and could enable ground-breaking performances in many scientific and industrial imaging applications.

Highlights

  • Single-photon (SP) imaging offers the ultimate performance in an imaging system due to its ability to capture and register each incoming photon [1,2]

  • We have presented a concept for a single-photon image sensor using multiple non-destructive signal sampling in CMOS image sensor technology

  • By averaging multiple signal samples that are statistically independent, the readout electronic noise can be reduced by the square root of the number of samples. This allows the noise level to be reduced to equivalent noise charge (ENC) < 0.15 e- RMS, a level widely considered necessary for single electrons to be reliably distinguished

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Summary

Introduction

Single-photon (SP) imaging offers the ultimate performance in an imaging system due to its ability to capture and register each incoming photon [1,2]. Recent advances in CMOS image sensor (CIS) technology have reduced readout noise significantly, and CISs with an ENC below 0.3 eRMS have been reported [6,7,8] These developments are due to the increase of the conversion gain of the sensors above 200 μV/e- by the use of special design and processing techniques, as well as by improvements to the noise performance of MOSFETs. Further noise improvements using those methods are certainly possible, difficulties increase as the noise approaches the required level of 0.15 e- RMS. In this paper we investigate the suitability of CIS-based skipper designs to achieving deep sub-electron readout noise for single-photon visible light imaging.

Operating Principles
In step
Readout
Linearity and Full Well Capacity
Design
Performance Limitations
Sensor Architecture
Findings
Conclusions and Outlook
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