Abstract
Calculation or as it is customary to say, the implementation of logical functions since the invention of an electromagnetic relay is one of the most important tasks solved by digital equipment. FPGA type (field-programmable gate array) uses the so-called LUT (Look up Table), a logic function generator made in the form of a MOS transistor tree for implementing a selector multiplexer (one-bit permanent memory with n address inputs), configurable by data inputs for the calculation of only one logical function for a given configuration. The authors developed new logical elements that improve their characteristics. An element is proposed that implements logical system functions, an element that has fault tolerance. The article analyzes the results of modeling these elements in NI Multisim 10 firm National Instruments Electronics Workbench Group for power consumption and delay. It is concluded that they can be used in FPGAs.
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