Simulation of the Esaki-tunneling FET

Abstract

As the dimension of the metal oxide semiconductor field effect transistor (MOSFET) keeping scaling, the short channel effects are becoming serious problems. Recently a MOS-based vertical tunneling transistor in silicon was proposed as a possible successor of the MOSFET. In this work, the device simulation of this novel transistor is performed in order to investigate the impacts of doping profile, gate oxide thickness and drain doping level on the device performance. The simulation shows that the sharp doping profile, thin gate oxide thickness and high drain doping level are the key technologies for fabricating the high performance Esaki-tunneling FET. Finally, the optimized device with high performance is proposed.