Abstract
Now a days different Junction less Transistor(JLT) structures proposed which includes silicon on insulator(SOI) JLT, Double gate (DGLJT) JLT, Bulk planar JLT, Gate all around(GAA) JLT etc. to improve performance parameters such as sub threshold slope(SS), off state leakage current, drain induced barrier lowering(DIBL) etc. In this paper, JLTs with dual spacer structures shows better improvement as compared to single spacer structure. Due to high electron mobility property of GaAs, Si has been replace by it as channel material in device. It has been also seen that there is off state current reduction while increment in on state current.
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