Abstract
In semiconductor wafer fabrication (wafer fab), wafers go through hundreds of process steps on a variety of processing machines for electrical circuit building operations. One of the special features in the wafer fabs is that there exist batch processors (BPs) where several wafer lots are processed at the same time as a batch. The batch processors have a significant influence on system performance because the repetitive batching and de-batching activities in a reentrant product flow system lead to non-smooth product flows with high variability. Existing research on the BP control problems has mostly focused on the local performance, such as waiting time at the BP stations. This paper attempts to examine how much BP control policies affect the system-wide behavior of the wafer fabs. A simulation model is constructed with which experiments are performed to analyze the performance of BP control rules under various production environments. Some meaningful insights on BP control decisions are identified through simulation results.
Highlights
In wafer fabrication facilities, semiconductor chips are made out of silicon wafers, thin and round slices of semiconductor material, by building electrical circuits on wafers layer by layer
Since semiconductor processing equipment is very expensive, it is shared by the jobs during different process steps, leading to reentrant product flow. (In this paper, the jobs refer to wafer lots.) Because of the long sequences of operations and resource sharing caused by reentrant product flow, most wafer fabs suffer from high work-in-process (WIP) inventories and long lead times
Since this paper focuses on the batch processors, commonly used control rules are applied for lot release decisions and dispatching decisions for Discrete processors (DPs) stations
Summary
Semiconductor chips are made out of silicon wafers, thin and round slices of semiconductor material, by building electrical circuits on wafers layer by layer. Wafers in the wafer fab move through these processes in lots generally consisting of 20–25 individual wafers. A wafer lot goes through 500–700 process steps on more than one hundred machines [1]. Since semiconductor processing equipment is very expensive, it is shared by the jobs during different process steps, leading to reentrant product flow. (In this paper, the jobs refer to wafer lots.) Because of the long sequences of operations and resource sharing caused by reentrant product flow, most wafer fabs suffer from high work-in-process (WIP) inventories and long lead times (often more than one month). Since the cost of building a wafer fab is enormous, often more than ten billion dollars [2], the system capacity cannot be expanded. The wafer fab should be efficiently operated with a given facility capacity
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