Abstract

A simplified EEPR Viterbi detector based on a transformed radix-4 trellis using 16/17 maximum transition run (MTR) code is developed. The transformed radix-4 trellis is a radix-4 trellis applying the transformed trellis in order to reduce complexity. The proposed Viterbi detector also applies a new simplification method that eliminates low likely states according to the equalized data (inputs of the detector). By this simplification, the ACS circuit size can be reduced to 60% as compared to the original radix-4 Viterbi detector. Moreover, the necessary path memory length for the Viterbi detector is theoretically derived by estimating the probability of the error patterns which can occur on the EEPRML channel using the 16/17 MTR code. Simulations show that the performance of the simplified Viterbi detector does not degrade on such a channel. The proposed simplification of the Viterbi detector is a useful way to implement the high-speed and low-power EEPR Viterbi detector.

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