Abstract
We present a reverse concatenation (RC) architecture with maximum transition run (MTR) modulation codes and Reed-Solomon (RS) error-correction codes (ECCs). The scheme employs a high-rate primary (pre-RS) MTR code and a secondary (post-RS) MTR code, which controls error propagation. The two modulation codes are designed in such a way to maximize the overall code rate and maintain simple hardware implementation. Simulation results demonstrate superior performance compared to reverse concatenation with non-MTR codes, especially at a relatively high recording density.
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