Silicon verification of flare model & application to real chip for long range proximity correction

Abstract

Optical proximity correction (OPC) plays a vital role in the lithography process for critical dimension (CD) control. With the shrinking of the design rule, CD is more sensitive to lithography process, so the task for OPC becomes more challenging. Flare, or stray light, is an added incoherent background intensity that will detract from lithography system performance, CD control and process latitude. The impact of flare on lithographic imaging and its correction through OPC has been the subject of increased investigation. In this paper, the flare effects on CD variation by changing the total image intensity are discussed. The flare map is obtained by running the flare model on the mask layout. Based on the flare map, flare test patterns are designed and flare test reticle is written. After collecting wafer silicon data with CD SEM, flare model is verified and the flare impacts on the across chip line width variation (ACLV) are presented. With the existence of flare, CD bias across different areas of the cell could be measured. As CD varies by a comparatively wider range than optical proximity range, it could not be corrected by existing OPC model. Based on the analysis of flare model and the experiment results, applications on flare correction are discussed by using OPC.