Abstract
We report a two-step silicon (Si) surface passivation technology for germanium-tin (Ge1-xSnx) p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs), featuring an initial low temperature atomic-layer-epitaxy or passivation step to suppress the segregation of subsurface germanium (Ge) and tin (Sn) atoms into the first monolayer of the ultrathin Si passivation layer. Evidence of reduced Ge and Sn segregation into the ultrathin Si passivation layer is provided by angle-resolved X-ray photoelectron spectroscopy (ARXPS) measurement. As compared to a Si passivation process performed at a higher temperature (370°C), the two-step Si passivation process gives ∼13% higher drive current in Ge0.94Sn0.06 pMOSFETs. It also achieved a high effective hole mobility μeff of 472 cm2/V·s at inversion carrier density Ninv of 1 × 1013 cm−2. The two-step Si surface passivation technology enables the formation of high-quality gate stack on Ge1-xSnx surface channel for high performance logic applications.
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