Silicon-gate CMOS frequency divider for electronic wrist watch

Abstract

An integrated complementary MOS transistor scale-of-two counter for applications in electronic wrist watches has been realized. Silicon-gate technology applied to a very simple but safe dividing circuit has resulted in a substantial reduction of the total area of the integrated structure with the following performance. At a supply voltage of 1.35 V the maximum frequency is 2 MHz and the dynamic power consumption per stage is 1.6 nW/kHz. The complementary substrate is obtained by a sealed-capsule low-surface concentration diffusion and doped oxides as impurity sources are used to allow simultaneous diffusion of both types of MOS transistors. A simple dynamic circuit derived from the basic structure is described.