Significant measureable development of inductance gain per unit of space in loop fractals

Abstract

A significant measureable development of inductance gain per unit of space in loop fractals for a suite of inductors which occupy the same layout space and require only a single-fabrication layer is investigated. All structures are fabricated on a borofloat glass substrate with dielectric constant loss tangent of 0.004. A chrome layer of 30 nm for adhesion followed by a 180 nm gold layer were sputtered and etched. To increase the surface area is implemented a simple geometrical strategy through fractalization and consequently the inductive performances is improved. Also, the higher fractal orders can be developed the inductive performance over 9 times from 0th to 3rd order. The fractal derivations of the original loop due to its space filling properties are examined and it suggests that although the effective electrode length increases, overall, the arrangement still essentially occupies the same space. In terms of design space for 0th, 3O-5O-7O of 1st, 2nd, and 3rd orders of fractals, 0, 26.2, 34.6, 38.6, 65.5, and 75.8% of occupied conductor surface area are saved. The measured inductances and resistances for aforementioned orders of fractals are 4.6 nH and 5 Ω, 8.6 nH and 10.5 Ω, 12 nH and 11.6 Ω, 12.8 nH and 17.3 Ω, 19.2 nH and 23.2 Ω, and 44.7 nH and 63.5 Ω, respectively.