Short-term plasticity circuit device exploration in the MASTISK neuromorphic framework

Abstract

In this paper, we present an enhanced version of our neuromorphic hardware simulation framework, MASTISK (MAchine-Learning and Synaptic-plasticity Technology Integration Simulation frameworK). We integrate the feature of short-term plasticity (STP) into the simulator to bring it closer to biological functionality. We introduce a novel cross-platform methodology for the implementation of STP synapses with user-tunable parameters using two-terminal emerging non-volatile memory devices. To study the impact of the proposed STP synapse circuit, a case study based on a non-filamentary bi-layer oxide-based resistive memory device (a Ta/HfO2/Al-doped TiO2/TiN device stack) is presented. The key performance parameters extracted from MASTISK are: mean square error (in terms of neuron firing rate), total STP synaptic device switching energy and worst-case device switching activity. We compare the performance of a pure long-term plasticity (LTP)-based network against a network with LTP + STP. The results indicate that there is a marginal loss in learning accuracy but greater stability in synaptic weight updates and enhanced noise tolerance. We also analyze the impact of user-tunable parameters for the proposed STP synapse circuit. The user-tunable parameters used for the analysis are: (1) STP history buffer size and (2) STP update threshold. Our analysis of the learning performance indicates a similar trend to that for the hyper-parameters used for regularization in artificial neural networks or support vector machines. Our analysis of device switching energy and switching activity gives us an idea of how to achieve an optimal trade-off in terms of endurance and power with regard to learning accuracy. We also study the impact of device non-linearity by simulating multiple devices with different asymmetric non-linearity values.