Abstract
A preamorphisation technology for fabrication of shallow p +-junctions for 0.25 μm CMOS was studied. Silicon and germanium ions were used for preamorphisation. A low energy BF + 2 implantation was used for the formation of the p +-region. The physical (SIMS,XTEM) and electrical characterisation of shallow p +-junctions will be presented. Large p +-diodes and 0.25 μm PMOS transistors were fabricated. The best results were obtained for Ge preamorphised material. Low leakage current p +-junctions with depth of 0.15 μm were obtained. However, the preamorphisation technology is complex, has a small process window for shallow p +- junctions and the benefits over a conventional approach are not significant. Excellent results were obtained for shallow p + junctions (0.18 μm) fabricated with conventional BF + 2 implants with reduced implantation energy and thermal budget.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
