SEU-hardened silicon bipolar and GaAs MESFET SRAM cells using local redundancy techniques

Abstract

Silicon bipolar and GaAs FET SRAMs have proven to be more difficult to harden with respect to single-event upset (SEU) mechanisms than have silicon CMOS SRAMs. This is a fundamental property of bipolar and JFET or MESFET device technologies which do not have a high-impedance, nonactive isolation between the control electrode and the current of voltage being controlled. All SEU circuit-level hardening techniques applied at the local cell level must use some type of information storage redundancy so that information loss on one node due to an SEU event can be recovered from information stored elsewhere in the cell. Several approaches to the use of local redundancy in bipolar and FET technologies are discussed. At the expense of increased cell complexity and increased power consumption and write time, several approaches are capable of providing complete SEU hardness at the local cell level.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>