Set and Reset Voltage Interdependence in Resistive Switching Memory Cells

Abstract

A statistical correlation between set voltage, Vset, and the preceding reset voltage, Vreset, has been observed on a multitude of devices in a resistive RRAM memory array. This correlation can be reproduced on a single device by generating a spread in Vreset values by varying the linear voltage ramp rate during the reset operation. The dependence of Vreset on voltage ramp rate is modeled successfully by assuming a fixed critical Joules heat required to trigger the rupture of the filament. The observed dependence of Vset and Vreset on the voltage ramp rate may be used to tighten Vset and Vreset distributions, by applying during the reset operation low voltage ramp rates to cells with high Vset and high ramp rates to cells with low Vset values.