Sequential and parallel strategies for the demand-driven simulation of logic circuits

Abstract

This paper examines methods for the simulation of digital logic circuits using a demand-driven schedule of evaluation. Demand-driven evaluation, in contrast with conventional event-driven and related methods, enables the exploitation of lazy evaluation to reduce simulation time. This potential is maximised by an effective ordering of demands in the evaluation schedule. Optimal ordering strategies are described, for both sequential and parallel evaluation cases, and a near-optimal heuristic strategy is identified for two processor evaluation. Simulation results are presented which demonstrate the effectiveness of the method and strategies employed.