Abstract
An ultralow power 0.6 V neural amplifier with on-chip analog spike detection is presented. A capacitively-coupled instrumentation amplifier (CCIA) with the current-reused and self-biased scheme is proposed to reduce the overall power consumption and to enhance the noise efficiency. The transistors in the amplifier are operated in the subthreshold region to enhance noise performance. The analog-domain spike detection based on a low power peak detector can reduce the overall power consumption. The circuit is fabricated using the standard 0.18 μm CMOS process. The passband of the circuit is from 6.4 Hz to 4.46 kHz. Input-referred noise is 10.68 μVrms. The supply voltage is 0.6 V, and the power consumption of the singlestage CCIA is 50.6 nW. The CCIA achieves a good noise efficiency factor and power efficiency factor of 1.79 and 1.93, respectively. The overall power consumption including two CCIAs, the programmable gain amplifier, and the analog spike detector is 269.8 nW. Input spikes with an amplitude of 50 μV at 100-Hz intervals are accurately detected.
Highlights
Neural signal acquisition systems have been used in wide neuroscience applications for diagnosis and treatment of various diseases from the implantable neural prosthetic electronics to portable cell-based sensing platforms in combination with multi-electrodes array and stimulation electronics [1], [2]
We propose an ultralow power neural amplifier integrated circuit (IC) with analog on-chip spike detection
This paper presents an ultralow power energy-efficient neural amplifier circuit with on-chip analog spike detection
Summary
Neural signal acquisition systems have been used in wide neuroscience applications for diagnosis and treatment of various diseases from the implantable neural prosthetic electronics to portable cell-based sensing platforms in combination with multi-electrodes array and stimulation electronics [1], [2]. Ko: Self-Biased Ultralow Power Current-Reused Neural Amplifier With On-Chip Analog Spike Detections saving power consumption. The self-biased and current-reused scheme is proposed for the front-end CCIA to reduce power consumption and to enhance noise efficiency. The current-reused topology in the front-end CCIA allows for low power consumption while maintaining low input noise performance.
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