Abstract

Ternary metallic amorphous silicon (a-Si-Ge-B), having a high barrier height feature with crystalline semiconductors is applied to the gate metal of Si MESFET's. A submicrometer gate length is successfully fabricated using a self-aligned technology and a conventional photolithography. A large transconductance above 130 mS/mm under the normally-OFF state and a small standard deviation of threshold voltage less than 11 mV are realized for a 0.5-µm gate-length device across a 4-in-diameter wafer. A minimum delay time of 114 ps/gate with an associated switching energy of 1.6 pJ and a minimum switching energy of 3.3 fJ with a delay time of 26 ns/gate are attained by a 21-stage ring oscillator with E/R direct-coupled FET logic circuits.

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