Abstract

ABSTRACTWe have extended our recent work on nano-scale CoSi2 formation from Co/Ti(O)multilayers on Si(100) to a self-aligned epitaxial CoSi2 structure produced by a two-step RTA annealing process. Parallel oxide stripes/Si windows were produced on a 4-inch Si(100) wafer by thermal oxidation and patterning. Six layers of 20nm Co and 10nm Ti were deposited sequentially on the patterned wafers with Ti as the first layer. The wafers were then annealed at 550°C to 700°C in N2 using a lamp RTA system. XTEM and RBS showed that a 25nm CoSi layer formed at the interface after a 650°C, 60sec annealing. The unreacted layers above it and oxide were selectively removed leaving a residual amorphous layer and CoSi intact on the patterned Si substrates. A second annealing at 900'C for 10sec produced 20nm of epitaxial CoSi2 covered with an ∼10nm CoxTiy(O)Siz surface layer. The epitaxial CoSi2 layer was thermally stable up to 1000°C, had a resistivity of ∼20μΩ-cm, and consumed ∼300Å of Si, thereby satisfying the most stringent deep submicron device contact scaling requirements.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call