Self-Aligned Double Injection-Function TFT for Deep Sub-Micrometer Channels’ Length—Application to Solution-Processed Indium Gallium Zinc Oxide

Gil Sheleg,Nir Tessler

doi:10.1109/ted.2021.3138361

Abstract

We propose and demonstrate self-aligned Double Injection Function Thin Film Transistor (DIF-TFT) architecture that mitigates short channel effects in 200 nm channel on non-scaled insulator (100 nm SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ). In this conceptual design, a combination of ohmic-like injection contact and a high injection-barrier metal allows maintaining the high ON currents while suppressing drain-induced barrier lowering (DIBL) effects. Using an industrial 2-D device simulator (Sentaurus), we propose two methods to realize the DIF concept. We use one of them to demonstrate, experimentally, a DIF-TFT based on solution-processed indium gallium zinc oxide (IGZO). Using molybdenum as the ohmic contact and platinum as the high injection barrier, we compare three transistors’ source-contacts: ohmic, Schottky, and DIF. The fabricated DIF-TFT exhibits saturation at sub 1 V drain bias with only about a factor of 2 loss in ON current compared to the ohmic contact.

Highlights

T HIN Film Transistor (TFT) technology [1] allows the scalability and profitability for major manufacturing companies in today’s consumer electronics market
Compared to a standard MOSFET process, the TFT architecture can be implemented with relative ease, making it an ideal candidate for the end of the process electronics or as a standalone technology
To examine the effect of having a double work function, we plot in Fig. 5 the transfer characteristics of a series of TFTs where the injection barrier of M2 varies between φsb = 50 meV and φsb = 1.05 eV

Summary

INTRODUCTION

T HIN Film Transistor (TFT) technology [1] allows the scalability and profitability for major manufacturing companies in today’s consumer electronics market. The Schottky contact TFT architecture is known as the source gated transistor [7]–[9] In parallel to this field, the Schottky barrier contact found its application in short channel vertical organic FETs [10]–[14]. As both approaches rely on well-established physical phenomena, one can find detailed theoretical analysis of these structures [15]–[17]. The introduction of field relief plate in lateral FETs [8] or electric field shield in vertical ones [20] allows lifting the requirement for a high injection barrier This method is most effective for lateral FETs of above micrometer channel lengths (2–4 μm in Sporea et al [8]). We expect our methodology to be important where scaling down [24] or over-scaling [25], [26] are not sufficient or not viable

ARCHITECTURE AND DEVICE OPERATION

SIMULATION

DEVICE FABRICATION

EXPERIMENTAL RESULTS AND DISCUSSION

CONCLUSION