Abstract

Ever since the invention of various leakage power reduction techniques, leakage and dynamic power reduction techniques are categorized into two separate sets. Most of them cannot be applied together during runtime. The gap between them is due to the large energy breakeven time (EBT) and wake-up time (WUT) of conventional leakage reduction techniques. This paper proposes a new leakage reduction technique (SLITH) based on Vth hopping. SLITH has very low EBT and WUT, yet keeps the effectiveness of leakage reduction. Thus, it is able to reduce the gap, and enables joint dynamic and leakage power reduction. SLITH can be applied together with clock gating, precomputation and operand isolation etc., and significantly reduces both dynamic and active leakage power consumption.

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