Selective Harmonic Elimination PWM for Cascaded H-bridge Multilevel Inverter with Wide Output Voltage Range Using PSO Algorithm

Abstract

Due to multilevel inverters' diverse applications in many contexts such as electric vehicles as well as motor drives, a wide output voltage range with low total harmonic distortion is significantly important. There are different methods to reduce harmonic distortion, like selective harmonic elimination (SHE). In this method, by some evolutionary algorithms, the low-order harmonics can be eliminated or minimized. However, in a low modulation index (for example 0.1 to 0.5), the mentioned harmonics have a considerable amplitude and are not eliminated, which increases the harmonic distortion in the output voltage and current. In order to solve the mentioned problem, a method is proposed in this paper. The proposed method is based on reducing the dc-link voltage of the cascaded H-bridge (CHB) multilevel inverter when a low output voltage is required. Therefore, even when the output voltage is low, the modulation index will be high enough which leads to a decrease in the harmonic distortion. The proposed method is examined on a PSO-based SHE-PWM seven-level CHB inverter using simulation in MATLAB software. The results indicate a considerable improvement of the output waveform quality in the case of low output voltage values.