Abstract

Random numbers are widely used in various applications. In the majority of cases, a pseudo-random number generator is used since true random number generators are slow and they are barely suitable for the hardware implementation. In this paper, we present new architecture of URNG (uniform random number generator) employing Leap-Ahead LFSR architecture for hardware implementation. In particular, the proposed URNG consists of two more segmented Leap-Ahead LFSRs to overcome the drawback of the conventional URNG employing Leap-Ahead architecture, that is, the sharp decrease of a maximum period of the generated random numbers. Thus, the proposed URNG with segmented LFSR architecture can generate multiple bits random number in a cycle without the frequent diminishing of maximum period of the generated random numbers. We prove the efficiency of the proposed segmented LFSR-architecture through the mathematical analysis. The simulation results show that the proposed URNG employing segmented Leap-Ahead LFSR architecture can be increased 2.5 times of the maximum period of generated random numbers compared to the URNG using the conventional Leap-Ahead architecture.

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