Security evaluation at design time against optical fault injection attacks

Abstract

The security of cryptographic processors is endangered by optical fault injection attacks. Transistors hit by a pulse of photons causes them to conduct transiently, thereby introducing transient logic errors, such as register value modifications, memory dumping and so on. Attackers can make use of this abnormal behaviour and extract secure information that the devices try to protect. This paper presents a simulation methodology to evaluate the security of cryptographic processors against optical fault injection attacks at design time. This simulation methodology involves exhaustively scanning the layout, incorporating the exposed cells into a circuit simulator and examining the response of the circuit in detail. Simulation performed on a test chip demonstrates that optical fault injection could harm the security of the cryptographic processors in various ways. Experiments conducted on the same test chip spot the same vulnerabilities, thus indicating the validity of the proposed simulation methodology.