Security analysis of reversible logic cryptography design with LFSR key on 32-bit microcontroller

Abstract

This paper presents a detailed security analysis of the research article on the digital image encryption scheme entitled "Reversible Logic Cryptography Design (RLCD) with Linear Feedback Shift Register (LFSR) key" (Karunamurthi S, and Natarajan VK, Microprocessors and Microsystems, 2019). Although the inadequate length of its 4-bit LFSR key makes the scheme extremely vulnerable to quick brute force attack, analyzing the various error metrics concerning the security of the encrypted images, this scheme provides statistically pleasing results. The major shortcoming identified on this RLCD-LFSR scheme is the traceable patterns that appear on its encrypted images due to the absence of confusion to break the pixels' correlation. In addition to the chosen plaintext attack, edge detection based cryptanalysis proposed in this paper to be sufficient to crack the RLCD-LFSR scheme. The enhancement made by the insertion of a confusion module in RLCD-LFSR scheme wipes out the perceptible patterns and edges from the encrypted images to resist the attacks. The failure of enhanced RLCD-LFSR under NIST tests confirms the flaws in the design of the Reversible Logic Gate (RLG) based diffusion process and its ineffectiveness for image encryption. Besides the security analysis, the performance of RLCD-LFSR scheme and the proposed improved version of the same is implemented on a 32-bit microcontroller to evaluate their suitability for real-time embedded applications.