Schottky barrier height reduction for metal/n-InP by inserting ultra-thin atomic layer deposited high-k dielectrics

Abstract

Fermi level pinning at metal/n-InP interface and effective Schottky barrier height (ФB,eff) were optimized by inserting ultrathin dielectrics in this work. Comparing the inserted monolayer and bilayer high-k dielectrics, we demonstrated that the introduction of bilayer dielectrics can further reduce ФB,eff (from 0.49 eV to 0.22 eV) than the monolayer dielectric (from 0.49 eV to 0.32 eV) even though the overall dielectric thickness was thicker. The additional dipole formed at high-k/high-k interfaces could be used to expound the mechanism. This work proposed an effective solution to reduce resistance contacts for InP based transistors and Schottky barrier transistors.