Scaling Study on High-Current Density Low-Dispersion GaN Vertical FinFETs

Abstract

GaN vertical FinFETs on a bulk GaN substrate were fabricated with various fin widths and 400 ns pulsed I-V measurements were performed to investigate their self-heating and DC-RF dispersion. With low-temperature post-gate processes including Ar plasma-enhanced Ohmic contact, a high drain current density (>175 kA cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">–2</sup> ) and a low gate leakage (<1 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">–7</sup> kA cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">–2</sup> ) could be achieved simultaneously. When normalized by the active fin area, the specific on-resistance was 0.030mΩcm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> at the drain on-current of 119 kA cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">–2</sup> for the 300nm fin-width single-finger device. A 25-finger device with the same fin width and fin-to-fin pitch of 3 μm showed the on-resistance of 0.043mΩcm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> (0.43mΩcm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> when normalized by the total device area of 6000 μm2), which was one of the lowest values reported. Low DC-RF dispersion was observed for the devices more than 2.5mm away from the wafer edge. This study also reports that more influence of self-heating was observed as the fin width scaled down or the number of fingers increased.