Run-time Reconfiguration of expandable cache for embedded systems

Abstract

Expandable cache is very efficient in reducing miss rate and energy consumption with small area overhead. However, using only MSB for cache expansion may lead to thrashing problems. Based on the structure of expandable cache, a new cache design which considers program behavior and has more flexible expansion schemes is introduced. The expansion scheme of our proposed cache design is dynamically changed by executing configuration instructions. The experimental results of SPEC CPU2000 show that our proposed cache design effectively improves the miss rate and energy consumption by 37.7% and 13.6%, respectively, as compared with direct-mapped cache. As compared with expandable cache, the improvements of our method are about 6.6% and 2.6% higher in terms of miss rate and energy consumption.