Roundoff Noise Analysis of Two Efficient Digital Filter Structures

Abstract

The paper deals with the problem of efficient digital filter structures with roundoff noise consideration. Two efficient structures are analyzed for the implementation scheme of rounding before multiplication. The first one is the recently proposed direct-form II transposed structure in /spl rho/-operator (/spl rho/DFIIt) (Li, G. and Zhao, Z.X., IEEE Trans. Circuits Sysm. 1, vol.51, p.769-78, 2004), based on which a revised /spl rho/DFIIt structure, denoted as /spl rho/RDFIIt, is obtained. It is shown that a /spl rho/RDFIIt structure, having the same implementation complexity as that of the corresponding /spl rho/DFIIt, yields a smaller roundoff noise gain than the latter. The roundoff noise gain for an /spl rho/RDFIIt structure with error feedback is also derived. The optimal structure problem is formulated and solved for each structure. A numerical example is presented to illustrate that the optimized structures are very competitive, as they can even over-perform the traditional optimal states-pace realization in terms of the roundoff noise performance as well as implementation complexity.