Efficient Digital Filter Structures with Minimum Roundoff Noise Gain

Abstract

This paper deals with efficient digital filter structures with roundoff noise consideration. Based on the recently proposed direct-form II transposed structure in /spl rho/-operator (/spl rho/DFIIt) (G. Li and Z.X. Zhao, IEEE Trans. Circuits Sys. I, vol. 51, pp. 769-778, 2004), an alternative structure is obtained, with replacing the 1st-order /spl rho/-operators in /spl rho/DFIIt with a set of 2nd-order polynomial operators, and hence denoted as /spl rho/IDFIIt. Expressions for evaluating the roundoff noise gain are derived for this new structure and its equivalent state-space realization. It is shown that for a given filter, the state-space realization always yields a smaller roundoff noise gain than the /spl rho/IDFIIt. The optimization problem is focused on how to choose the 2nd-order operators to minimize roundoff noise gain. A genetic algorithm (GA) is proposed to efficiently solve this problem. A design example is given to illustrate the advantage of the proposed structures and confirm the theoretical analysis.