Robustness‐oriented P‐band phased array radar front‐end with high phase and gain resolution in 0.18 BiCMOS

Abstract

In this study, the authors present a P-band phased array front-end for radar applications, implemented using a 0.18 μ m SiGe BiCMOS process, thereby enhancing robustness over process-voltage-temperature (PVT) variations. It comprises a low noise amplifier, 6-bit attenuator, 6-bit phase shifter, power amplifier, T-R switches as well as control circuits. As the key here is to achieve high resolutions in both gain and phase controls, the 6-bit attenuator and 6-bit phase shifter are optimised by cascading unit cells with different topologies, hence ensuring a good balance between accuracy, silicon area and robustness. Temperature compensation techniques are also used in the low noise amplifier and power amplifier so that the circuit works robustly against PVT variations. Fabricated using TowerJazz 0.18 μ m SiGe BiCMOS technology, the prototype front-end occupies a chip area of 5 × 2.5 mm 2 , including bonding pads and test buffers. It performs with a receiver (RX) gain of 12 dB, a 3 dB noise figure, and a transmitter (TX) gain of 29 dB, while consuming 60 mW (RX mode) and 600 mW (TX mode) from a 3.3 V supply voltage. The chip is also measured in extreme conditions (e.g. temperatures exceeding 100 ° C ) to ensure robust operation and is suitable for low-cost phased array systems.