Robustness IPs for reliability and security of SoCs

Abstract

Increased performance has been the key innovation in new products over the last few years. Market demand for this performance feature has helped make the semiconductor business quite profitable. Technology evolution has been driven steadily by more performance at a lower cost. To meet such time-to-market constraints functional IP has been leveraged because of its reusability feature. Approaching physical limits of silicon with a huge number of transistors threatens the manufacturability and usability of the final system on a chip (SoC). Yield, debugging, test and reliability are now more and more critical for SoC sign-off Infrastructure IPs enable designers to manage these challenges by detecting, analyzing and correcting defects or signal corruption. One specific domain where infrastructure IP brings a key value is robustness. Signal integrity is becoming more and more critical in VDSM chips, causing a new challenge that threatens information integrity, systems availability and security. Both consumer and business owners of electronic products will demand high reliability as a companion to performance. Downtime and ongoing service costs must be reduced or eliminated. We call this the Robustness Challenge.