Robust near-threshold inverter with improved performance for ultra-low power applications

Abstract

Near-threshold computing (NTC) is a promising technique for low power applications. In this paper, novel circuit techniques for near-threshold computing are developed for improved power, performance, and robustness to noise. Two separate differential signaling based circuits are proposed which outperform CMOS and current-mode logic (CML) operating at near-threshold. The proposed circuits are described as dynamic current-mode logic (DCML) and latched DCML (LDCML). Characterization of the CMOS, CML, and the proposed DCML logic families is performed for area, power, performance and noise immunity at both the nominal and near-threshold operating voltages. At a near-threshold voltage, the DCML logic family reduces the total power by 32% while improving the performance by 82% as compared to CMOS logic. The use of DCML logic also reduces the total power consumption by 92% while improving the performance by 64% as compared to CML logic operating at near-threshold. In addition, the robustness of the proposed logic families to noise is analyzed. At near-threshold voltages, both the noise margins of LDCML is improved by more than 1.4x as compared to CMOS logic.