Abstract
Number comparison has long been recognized as one of the most fundamental non-modular arithmetic operations to be executed in a non-positional Residue Number System (RNS). In this paper, a new technique for designing comparators of RNS numbers represented in an arbitrary moduli set is presented. It is based on a newly introduced modified diagonal function, whose strictly monotonic properties make it possible to replace the cumbersome operations of finding the remainder of the division by a large and awkward number with significantly simpler computations involving only a power of 2 modulus. Comparators of numbers represented in sample RNSs composed of varying numbers of moduli and offering different dynamic ranges, designed using various methods, were synthesized for the 65 nm technology. The experimental results suggest that the new circuits enjoy a delay reduction ranging from over 11% to over 75% compared to the fastest circuits designed using existing methods. Moreover, it is achieved using less hardware, the reduction of which reaches over 41%, and is accompanied by significantly reduced power-consumption, which in several cases exceeds 100%. Therefore, it seems that the presented method leads to the design of the most efficient current hardware comparators of numbers represented using a general RNS moduli set.
Highlights
Parallel data processing is one of the most viable approaches to meet steadily growing needs for high-performance computations
Leads to inefficient circuitry. (Because the design method proposed here is based on some ideas of the diagonal function, while aiming to avoid its drawbacks, it will be detailed in Section 2.) Some other general approaches to Residue Number System (RNS) number comparison were presented in [15,17,22,26,27]
The main disadvantage of Algorithm 1 is that the computation of the remainder of the division over the modulus Sum of Quotients (SQ), executed by the n-operand multi-operand modular adder (MOMA) mod SQ, is both hardware and time-consuming. (It will be seen later that for sample moduli sets the difference between the bit sizes of M and SQ could be from 3 to 5-bits.) In [16], it was suggested that in the case of the equality D(X) = D(Y), an extra comparison must be executed
Summary
Parallel data processing is one of the most viable approaches to meet steadily growing needs for high-performance computations. (Because the design method proposed here is based on some ideas of the diagonal function, while aiming to avoid its drawbacks, it will be detailed in Section 2.) Some other general approaches to RNS number comparison were presented in [15,17,22,26,27]. The drawbacks of the previous magnitude comparison algorithms are: the need for using a redundant modulus, restricting the moduli set or time-consuming modulo operations involving large numbers (the size of the dynamic range or close). The new approach proposed here relies on integrating techniques from [16,26], and it is based on modifying the diagonal function of the numbers represented in RNS.
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